View ADG701L_533676.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CMOS Low Voltage 2 SPST Switches ADG701L/ADG702L
FEATURES
1.8 V to 5.5 V single supply 2 (typical) on resistance Low on resistance flatness Guaranteed leakage specifications up to 85C -3 dB bandwidth > 200 MHz Rail-to-rail operation Fast switching times tON 18 ns tOFF 12 ns Typical power consumption < 0.01 W TTL/CMOS-compatible
FUNCTIONAL BLOCK DIAGRAMS
ADG701L
S D
IN
05486-001
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
ADG702L
APPLICATIONS
Battery-powered systems Communication systems Sample-and-hold systems Audio signal routing Video switching Mechanical reed relay replacement
S
D
IN
05486-020
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 2.
GENERAL DESCRIPTION
The ADG701L/ADG702L are monolithic CMOS SPST switches. These switches are designed using an advanced submicron process that provides low power dissipation, yet offers high switching speed, low on resistance, and low leakage currents. In addition, -3 dB bandwidths of greater than 200 MHz can be achieved. The ADG701L/ADG702L can operate from a single 1.8 V to 5.5 V supply, making it ideal for use in battery-powered instruments and with the new generation of DACs and ADCs from Analog Devices. Figure 1 and Figure 2 show that with a logic input of 1, the switch of the ADG701L is closed, while that of the ADG702L is open. Each switch conducts equally well in both directions when on. The ADG701L/ADG702L are packaged as 5-lead SOT-23, 6-lead SOT-23, and 8-lead MSOP.
PRODUCT HIGHLIGHTS
1. 1.8 V to 5.5 V single-supply operation. The ADG701L/ ADG702L offer high performance, including low on resistance and fast switching times. The ADG701L/ ADG702L are fully specified and guaranteed with 3 V and 5 V supply rails. Very low RON (3 maximum at 5 V, 5 maximum at 3 V). At 1.8 V operation, RON is typically 40 over the temperature range. On resistance flatness RFLAT(ON) (1 maximum). -3 dB bandwidth > 200 MHz. Low power dissipation. CMOS construction ensures low power dissipation. Fast tON/tOFF.
2.
3. 4. 5. 6.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
ADG701L/ADG702L TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ..............................................7 Test Circuits........................................................................................8 Terminology .......................................................................................9 Applications Information .............................................................. 10 Supply Voltages........................................................................... 10 Bandwidth ................................................................................... 10 Off Isolation ................................................................................ 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 12
REVISION HISTORY
11/06--Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG701L/ADG702L SPECIFICATIONS
VDD = 5 V 10%, GND = 0 V. Temperature range for the B version is -40C to +85C, unless otherwise noted. Table 1.
B Version -40C to +85C +25C 0 V to VDD 2 3 0.5 4 1.0 LEAKAGE CURRENTS Source Off Leakage, IS (OFF) Drain Off Leakage, ID (OFF) Channel On Leakage, ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS 1 tON tOFF Charge Injection Off Isolation Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 0.01 0.25 0.01 0.25 0.01 0.25
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Flatness (RFLAT(ON))
Unit V typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
Test Conditions/Comments
VS = 0 V to VDD, IS = -10 mA; see Figure 12 VS = 0 V to VDD, IS = -10 mA VDD = 5.5 V VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13 VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13 VS = VD = 1 V, or 4.5 V; see Figure 14
0.35 0.35 0.35 2.4 0.8
0.005 0.1 12 18 8 12 5 -55 -75 200 17 17 38 0.001 1.0
VIN = VINL or VINH
RL = 300 , CL = 35 pF VS = 3 V; see Figure 15 RL = 300 , CL = 35 pF VS = 3 V; see Figure 15 VS = 2 V, RS = 0 , CL = 1 nF; see Figure 16 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 , CL = 5 pF; see Figure 18
VDD = 5.5 V Digital inputs = 0 V or 5 V
1
Guaranteed by design, not subject to production test.
Rev. 0 | Page 3 of 12
ADG701L/ADG702L
VDD = 3 V 10%, GND = 0 V. Temperature range for the B version is -40C to +85C, unless otherwise noted. Table 2.
B Version -40C to +85C +25C 0 V to VDD 3.5 5 1.5 0.01 0.25 0.01 0.25 0.01 0.25 6
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Drain Off Leakage ID (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS 1 tON tOFF Charge Injection Off Isolation Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
Unit V typ max typ nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
Test Conditions/Comments
VS = 0 V to VDD, IS = -10 mA; see Figure 12 VS = 0 V to VDD, IS = -10 mA VDD = 3.3 V VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13 VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13 VS = VD = 1 V, or 3 V; see Figure 14
0.35 0.35 0.35 2.0 0.4
0.005 0.1 14 20 8 13 4 -55 -75 200 17 17 38 0.001 1.0
VIN = VINL or VINH
RL = 300 , CL = 35 pF VS = 2 V, see Figure 15 RL = 300 , CL = 35 pF VS = 2 V, see Figure 15 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 16 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 17 RL = 50 , CL = 5 pF; see Figure 18
VDD = 3.3 V Digital Inputs = 0 V or 3 V
1
Guaranteed by design, not subject to production test.
Rev. 0 | Page 4 of 12
ADG701L/ADG702L ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VDD to GND Analog, Digital Inputs 1 Continuous Current, S or D Peak Current, S or D Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature MSOP Package, Power Dissipation JA Thermal Impedance JC Thermal Impedance SOT-23 Package, Power Dissipation JA Thermal Impedance JC Thermal Impedance Lead Temperature, Soldering Vapor Phase (60 sec) Infrared (15 sec) Lead-free Reflow Soldering Peak Temperature Time at Peak Temperature ESD
1
Rating -0.3 V to +7 V -0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 30 mA 100 mA, pulsed at 1 ms, 10% duty cycle maximum -40C to +85C -65C to +150C 150C 315 mW 206C/W 44C/W 282 mW 229.6C/W 91.99C/W 215C 220C 260 (+0/-5)C 10 sec to 40 sec 2 kV
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADG701L/ADG702L PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
D1 NC 2 NC 3
8
S GND IN
05486-002
ADG701L/ ADG702L
D1 S2
6
7 6
ADG701L/ ADG702L
VDD NC
05486-003
D1 S2
5
5 4
IN
TOP VIEW GND 3 (Not to Scale)
4
IN
NC = NO CONNECT
NC = NO CONNECT
Figure 3. 8-Lead MSOP Pin Configuration
Figure 4. 6-Lead SOT-23 Pin Configuration
Figure 5. 5-Lead SOT-23 Pin Configuration
Table 4. Pin Function Descriptions
8-Lead MSOP 1 2, 3, 5 4 6 7 8 Pin Number 6-lead SOT-23 1 5 6 4 3 2 5-lead SOT-23 1 N/A 5 4 3 2 Mnemonic D NC VDD IN GND S Description Drain Terminal. May be an input or output. No Connect. Most Positive Power Supply Potential. Logic Control Input. Ground (0 V) Reference. Source Terminal. May be an input or output.
Table 5. Truth Table
ADG701L In 0 1 ADG702L In 1 0 Switch Condition Off On
Rev. 0 | Page 6 of 12
05486-004
TOP VIEW VDD 4 (Not to Scale) 5 NC
TOP VIEW GND 3 (Not to Scale)
ADG701L/ ADG702L
VDD
ADG701L/ADG702L TYPICAL PERFORMANCE CHARACTERISTICS
3.5 VDD = 2.7V 3.0 2.5 VDD = 3.0V VDD = 4.5V TA = 25C
10m
VDD = 5V
1m 100
ISUPPLY (A)
05486-005
RON ()
2.0 1.5 VDD = 5.0V 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VD OR VS (DRAIN OR SOURCE VOLTAGE (V)) 5.0
10 1 100n
1n 10
100
1k
10k 100k FREQUENCY (Hz)
1M
10M
Figure 6. On Resistance as a Function of VD (VS) Single Supplies
3.5 VDD = 3V 3.0 +85C +25C
Figure 9. Supply Current vs. Input Switching Frequency
-10 -20 -30
OFF ISOLATION (dB)
VDD = 5V, 3V
2.5
-40 -50 -60 -70 -80 -90
RON ()
2.0 1.5 1.0 0.5 0 0
-40C
05486-006
-100 -110 10k 100k 1M 10M FREQUENCY (Hz) 100M
0.5 1.0 1.5 2.0 2.5 VD OR VS (DRAIN OR SOURCE VOLTAGE (V))
3.0
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 3 V
3.5 VDD = 5V 3.0 2.5
Figure 10. Off Isolation vs. Frequency
0 VDD = 3V
ON RESPONSE (dB)
-2
+85C
RON ()
2.0 +25C 1.5 -40C 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VD OR VS (DRAIN OR SOURCE VOLTAGE (V)) 5.0
-4
05486-007
-6 10k
100k
1M 10M FREQUENCY (Hz)
100M
Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 5 V
Figure 11. Bandwidth
Rev. 0 | Page 7 of 12
05486-010
05486-009
05486-008
10n
ADG701L/ADG702L TEST CIRCUITS
IDS
V1
IS (OFF) A
05486-011
S
D
ID (OFF) S D A VD
05486-012
S
D
ID (ON) A VD
05486-013
VS
RON = V1/IDS
VS
VS
Figure 12. On Resistance
Figure 13. Off Leakage
Figure 14. On Leakage
VDD 0.1F VIN VDD S VS D RL 300 VOUT VIN CL 35pF VOUT GND
ADG701L
50%
50%
ADG702L
50% 90%
50% 90%
05486-014 05486-015
IN
tON
tOFF
Figure 15. Switching Times
VDD
VDD RS VS IN GND S D CL 1nF VOUT
VIN
ADG701L
ON OFF
VIN
ADG702L
QINJ = CL x VOUT VOUT
VOUT
Figure 16. Charge Injection
VDD 0.1F
0.1F VDD
VDD S D RL 50
VS VIN
VDD
VOUT
S
D RL 50
VOUT
IN VS VIN GND
IN GND
05486-016
Figure 17. Off Isolation
Figure 18. Bandwidth
Rev. 0 | Page 8 of 12
05486-017
ADG701L/ADG702L TERMINOLOGY
RON Ohmic resistance between D and S. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (OFF) Source leakage current with the switch off. ID (OFF) Drain leakage current with the switch off. ID, IS (ON) Channel leakage current with the switch on. VD (VS) Analog voltage on Terminal D and Terminal S. CS (OFF) Off switch source capacitance. CD (OFF) Off switch drain capacitance. CD, CS (ON) On switch capacitance. tON Delay between applying the digital control input and the output switching on. See Figure 15. tOFF Delay between applying the digital control input and the output switching off. Off Isolation A measure of unwanted signal coupling through an off switch. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Bandwidth The frequency at which the output is attenuated by -3 dB. On Response The frequency response of the on switch. On Loss The voltage drop across the on switch, seen in Figure 11 as the number of decibels the signal is away from 0 dB at very low frequencies.
Rev. 0 | Page 9 of 12
ADG701L/ADG702L APPLICATIONS INFORMATION
The ADG701L/ADG702L belong to the Analog Devices new family of CMOS switches. This series of general-purpose switches have improved switching times, lower on resistance, higher bandwidth, low power consumption, and low leakage currents. The signal transfer characteristic is dependent on the switch channel capacitance, CDS. This capacitance creates a frequency zero in the numerator of the transfer function, A(s). Because the switch on resistance is small, this zero usually occurs at high frequencies. The bandwidth is a function of the switch output capacitance combined with CDS and the load capacitance. The frequency pole corresponding to these capacitances appears in the denominator of A(s). The dominant effect of the output capacitance, CD, causes the pole breakpoint frequency to occur first. In order to maximize bandwidth, a switch must have a low input and output capacitance and low on resistance. The on response versus frequency for the ADG701L/ADG702L is shown in Figure 11.
SUPPLY VOLTAGES
Functionality of the ADG701L/ADG702L extends from 1.8 V to 5.5 V single supply, making the parts ideal for battery-powered instruments where power, efficiency, and performance are important design parameters. It is important to note that the supply voltage affects the input signal range, the on resistance, and the switching times of the part. The effects of the power supplies can be clearly seen in the Typical Performance Characteristics and the Specifications sections. For VDD = 1.8 V operation, RON is typically 40 over the temperature range.
OFF ISOLATION
Off isolation is a measure of the input signal coupled through an off switch to the switch output. The capacitance, CDS, couples the input signal to the output load when the switch is off (see Figure 20).
CDS S CD D VOUT VIN
05486-019
BANDWIDTH
Figure 19 illustrates the parasitic components that affect the ac performance of CMOS switches (a box surrounds the switch). Additional external capacitances further degrade some performance. These capacitances affect feedthrough, crosstalk, and system bandwidth.
CDS S RON VIN CD D VOUT
05486-018
CLOAD
RLOAD
Figure 20. Off Isolation Is Affected by External Load Resistance and Capacitance
CLOAD
RLOAD
Figure 19. Switch Represented by Equivalent Parasitic Components
The transfer function that describes the equivalent diagram of the switch (see Figure 19) is of the form A(s), as shown in the following equation:
s(RON C DS ) + 1 A(s) = RT s(RON CT RT ) + 1
where CT = CLOAD + CD + CDS.
The larger the value of CDS, the larger the values of feedthrough produced. Figure 10 illustrates the drop in off isolation as a function of frequency. From dc to roughly 1 MHz, the switch shows better than -75 dB isolation. Up to frequencies of 10 MHz, the off isolation remains better than -55 dB. As the frequency increases, more and more of the input signal is coupled through to the output. Off isolation can be maximized by choosing a switch with the smallest CDS possible. The values of load resistance and capacitance also affect off isolation, as they contribute to the coefficients of the poles and zeros in the transfer function of the switch when open.
s(RLOADC DS ) + 1 A(s) = RT s(RLOAD )(CT ) + 1
Rev. 0 | Page 10 of 12
ADG701L/ADG702L OUTLINE DIMENSIONS
2.90 BSC
3.00 BSC
6
8 5
5
4
1.60 BSC
2.80 BSC
1 2 3
3.00 BSC
1
4.90 BSC
4
PIN 1 INDICATOR 0.95 BSC 1.90 BSC
PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40
1.30 1.15 0.90
0.15 0.00 0.38 0.22 COPLANARITY 0.10
1.45 MAX
0.22 0.08 10 4 0 0.60 0.45 0.30
0.23 0.08 SEATING PLANE
0.15 MAX
0.50 0.30
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 21. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Figure 22. 6-Lead Small Outline Transistor Package [SOT-23] (RT-6) Dimensions shown in millimeters
2.90 BSC
5
4
1.60 BSC
1 2 3
2.80 BSC
PIN 1 0.95 BSC 1.30 1.15 0.90 1.90 BSC
1.45 MAX
0.22 0.08 10 5 0 0.60 0.45 0.30
0.15 MAX
0.50 0.30
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 23. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters
Rev. 0 | Page 11 of 12
ADG701L/ADG702L
ORDERING GUIDE
Model ADG701LBRJ-500RL7 ADG701LBRJ-REEL ADG701LBRJ-REEL7 ADG701LBRJZ-500RL7 2 ADG701LBRJZ-REEL2 ADG701LBRJZ-REEL72 ADG701LBRM ADG701LBRM-REEL ADG701LBRM-REEL7 ADG701LBRMZ2 ADG701LBRMZ-REEL2 ADG701LBRMZ-REEL72 ADG701LBRT-REEL ADG701LBRT-REEL7 ADG701LBRTZ-REEL2 ADG701LBRTZ-REEL72 ADG702LBRJ-REEL ADG702LBRJ-REEL7 ADG702LBRJZ-500RL72 ADG702LBRJZ-REEL2 ADG702LBRJZ-REEL72 ADG702LBRM ADG702LBRM-REEL ADG702LBRM-REEL7 ADG702LBRMZ2 ADG702LBRMZ-REEL2 ADG702LBRMZ-REEL72 ADG702LBRT-REEL ADG702LBRT-REEL7 ADG702LBRTZ-REEL2 ADG702LBRTZ-REEL72
1 2
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 5-Lead Small Outline Transistor Package [SOT-23] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23]
Package Option RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RT-6 RT-6 RT-6 RT-6 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RT-6 RT-6 RT-6 RT-6
Branding 1 S15 S15 S15 S10 S10 S10 S15 S15 S15 S10 S10 S10 S15 S15 S10 S10 S16 S16 S11 S11 S11 S16 S16 S16 S11 S11 S11 S16 S16 S11 S11
Due to package size limitations, these three characters represent the part number. Z = Pb-free part.
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05486-0-11/06(0)
Rev. 0 | Page 12 of 12

▲Up To Search▲

Price & Availability of ADG701L

	To Download ADG701L Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .